Intel Unveils 72-Core x86 Knights Landing CPU for Exascale Supercomputing

It seems when computing does make a technological advancement, sometimes it’s a big step in the next evolution of the game. Knights Landing, which sounds like a daytime TV show name starring David Hasslehoff, is Intel’s next “ante up” in the game of technology so I know some will be disappointed ☺. The Knights Landing platform is based on Intel’s next generation Xeon Phi supercomputing chip that can contain up to 72 out-of-order cores. The biggest alteration to the design is that in lieu of a slot design that must be paired-up with a standard Xeon CPU, the new Knights Landing is a standalone processor that will easier to integrate and expand upon.

Intel’s Knights Landing tale is one of a CPU that will have up to 16GB of DRAM 3D stacked on-package, that will provide up to 500GB/sec of memory bandwidth (along with up to 384GB of DDR4-2400 mainboard memory). When Intel makes the move to the 14nm process then Knights Landing will make its debut and this should happen sometime sin 2015. With the promise of such power that Knights Landing is bring to the table and its 3 teraflops (double precision) per socket we will most assuredly see 100+ petaflop X86 supercomputers being introduced very soon. Companies like Aberdeen LLC will be on the forefront of this technology the same as they were with the first petabyte server.

Currently the version of Xeon Phi (Knights Corner) and uses a PCIe expansion board with an up-to-61-core Intel MIC (Many Integrated Core) chips. These cores are based on the original P54C Pentium core and have many technological things in common with its stillborn Larrabee predecessor, although with many new additions that have come into play recently, such as 64-bit support and 512-bit vector registers. Knights’ Landing is essentially just a major revision of Knights Corner, but with mass changes across the entire platform. The original P54C cores have now been replaced with up to 72 out-of-order Silvermont (Atom) cores that will also implement AVX 3.1 instructions (AXX-512). Like stated earlier though the most ergonomic and important change is that now Knights Landing is a standalone CPU, with an integrated six-channel DDR4-2400 memory controller, up to 16GB of on-package 3D stacked RAM, and 36 PCIe 3.0 lanes.

The theoretical performance of 6 teraflops of single precision math, or 3 teraflops of double precision math is what all the new changes equate to and if you compare Intel’s Haswell you will see that Haswell maxes out at around 500 gigaflops of double precision math. Currently the crop of efficient supercomputers in existence max out at around 4 gigaflops per-watt, but with Knight’s Landing we should see 14-16 gigaflops per-watt, which might not seem like a big deal, but with scaling it amounts to quite a bit. There will be 16GB of on-package RAM with a bandwidth of 500GB/sec; there should also be significant latency gains as well with this step up. By Q4 of 2015 we will see another version of this technology called Knights Landing-F that integrates a 100Gbps Cray HPC interconnect on 32 of those PCIe 3.0 lanes, allowing supercomputer makers to connect up Knights Landing chips via standard QSFP optical links. Knights Landing is the next step on Intel’s road map to Exascale computing.

NVIDIA has their own solution called Tesla, which is their GPU-based coprocessor add-in board, and the Intel Xeon Phi is the direct competition to their market making stiff competitors for the men in green and black. NVIDIA currently has the “Lions Share” of the HPC/coprocessor market with 38 of the top 500 supercomputers using that technology. At the moment the Xeon Phi s a major component of the world’s most powerful supercomputer (Tianhe-2), but adoption is generally lower (just 13 of the top 500) by comparison. Making the move to becoming a standalone CPU rather than an ad-in card that must be controlled by a CPU (Haswell, Opteron, etc.), it will now be possible to build supercomputers entirely out of Xeon Phi that will reduce both the costs and the complexity of building supercomputers.

With Intel’s latest unified technology it will now be possible to write software that takes full advantage of Knights landings hardware and will make everything run smoother and faster. If we do the math At 3 teraflops per socket, assuming four sockets per 1U server, we’re looking at a full 500 teraflops (half a petaflop) in a single 42U rack. If the 100 petaflops barrier hasn’t been broken by 2015, it will almost certainly be a Knights Landing-based supercomputer that is the platform to do it. Intel is once again pushing the technology envelope and it will be interesting to say the least to see this new technology in action. Just think of the Knights Landing as the Chuck Norris of computer platforms ☺. Thanks for reading Tech of Tomorrow folks.

Source: Extreme Tech